1. Field of the Invention
The present invention relates generally to solid state image sensing devices and, more particularly to improvements of a dark current of a horizontal shift register in an output section of the solid state image sensing device.
2. Description of the Prior Art
FIGS. 1 and 2 of the accompanying drawings show an example of a vertical FIT (frame interline) type solid state image sensing device according to the prior art.
As shown in FIGS. 1 and 2, a conventional vertical FIT type solid state image sensing device generally depicted by reference numeral 12 comprises an image sensing section 1, a storage section 2 and an output section, i.e., a horizontal shift register section 3 of a CCD (charge-coupled device) structure. The image sensing section 1 comprises a number of photo-sensing elements 4, each forming a pixel, arrayed in a matrix fashion and a vertical shift register 5 of CCD structure disposed on one side of each vertical column of the photo-sensing elements 4 so as to transfer signal charges of the photo-sensing elements 4 in the vertical direction. The storage section 2 is disposed under the image sensing section 1 in the vertical direction to temporarily store signal charges generated from the image sensing section 1. The storage section 2 comprises a plurality of vertical shift registers 6 of similar CCD structure which corresponds to the respective vertical shift registers 5 of the image sensing section 1 in a one-to-one relation. The vertical shift register 5 of the image sensing section 1 and the vertical shift register 6 of the storage section 2 are both driven according to the 4-phase drive system which is controlled by four-phase drive pulses .PHI.IM.sub.1, .PHI.IM.sub.2, .PHI.IM.sub.3, .PHI.IM.sub.4 and .PHI.ST.sub.1, .PHI.ST.sub.2, .PHI.ST.sub.3, .PHI.ST.sub.4, for example. The horizontal shift register section 3 of the output section is driven according to the two-phase drive system which is controlled by two-phase drive pulses .PHI.H.sub.1 and .PHI.H.sub.2, for example.
In the high definition (very high resolution) solid state image sensing device, the horizontal shift register section 3 comprises two horizontal shift registers 3A and 3B disposed in parallel in order to reduce a horizontal transfer frequency. In the horizontal shift registers 3A and 3B, as shown in FIG. 2, a first storage unit st.sub.1, a first transfer unit tr.sub.1, a second storage unit st.sub.2 and a second transfer unit tr.sub.2 constitute one bit. A transfer section composed of the first storage unit st.sub.1 and the transfer unit tr.sub.1 to which there is applied the drive pulse .PHI.H.sub.1 corresponds to every other vertical shift register 6A and a transfer section composed of the second storage unit st.sub.2 and second transfer unit tr.sub.1 to which there is applied the drive pulse .PHI.H.sub.2 corresponds to remaining every other vertical shift register 6B. A transfer gate section 7 for transferring electric charges from the storage section 2 to the horizontal shift register section 3 is provided between the vertical shift register 6 (6A, 6B) of the storage section 2 and the horizontal shift register section 3. A transfer gate section 8 for transferring electric charges from the first horizontal shift register 3A to the second horizontal shift register 3B is provided between the first horizontal shift register 3A and the second horizontal shift register 3B. Further, a smear drain region 10 is provided under the second horizontal shift register 3B and extended over the full length of the second horizontal shift register 3B in order to discharge a smear component through a smear gate unit 9. Hatched areas 11 in FIG. 2 represent channel-stop regions, respectively.
This vertical FIT type solid state image sensing device 12 effects a high speed sweep transfer during a vertical blanking period to sweep smear components of the vertical shift registers 5, 6 to the smear drain region 10. Thereafter, signal charges in the photo-sensing elements 4 are transferred from the image sensing section 1 to the storage section 2 and temporarily stored therein. Then, at every horizontal blanking period, the signal charges of every horizontal line are distributed into the first and second horizontal shift registers 3A and 3B of the horizontal shift register section 3 from the storage section 2. That is, the signal charge in the vertical shift register 6A is transferred to the second horizontal shift register 3B and the signal charge in the vertical shift register 6B is transferred to the first horizontal shift register 3A. The signal charges of one horizontal line transferred to the first and second horizontal shift registers 3A, 3B are transferred within the first and second horizontal shift registers 3A, 3B in the horizontal direction and sequentially and alternately output through a switching means 13.
The above-mentioned FIT type solid state image sensing device 12 has the drawback such that a dark current of the second horizontal shift register 3B is very much large as compared with that of the first horizontal shift register 3A. A cause of this drawback is considered as follows:
A hole (positive hole), which causes a dark current, is transferred to the horizontal shift register section 3 in the same direction as that of the smear component (electron) because the vertical shift registers 5, 6 are driven by the four-phase drive system. In addition, the smear drain region 10 disposed under the second horizontal shift register 3B acts as a barrier against the hole so that the hole remaining in the second horizontal shift register 3B cannot be smoothly drained to the channel stop region 11.